Analog IC's test device
专利摘要:
The present invention relates to a device that can automatically test the performance of an analog integrated circuit (IC), A device that temporarily stores the signal data output from each output pin (P 1 ~ P n ) of the analog IC sequentially in the memory section, and automatically compares the stored signal data with the good status data at the main control section. By realizing this, it is possible to reduce the time required for measurement and to accurately discriminate between good and bad parts, thereby improving the reliability of the test process of the analog IC. 公开号:KR19990035473A 申请号:KR1019970057276 申请日:1997-10-31 公开日:1999-05-15 发明作者:공영준 申请人:전주범;대우전자 주식회사; IPC主号:
专利说明:
Analog IC's test device The present invention relates to a test apparatus that checks the performance of an analog integrated circuit (IC), and in particular, extracts a signal from each pin of an analog IC and compares the data with a good product. A test apparatus for an analog IC. In the conventional analog IC test apparatus, as shown in FIGS. 1 and 2, an analog IC 10 inserted into a printed circuit board 20 as an object to be measured is an oscilloscope, and each pin of the analog IC 10 is inserted into an oscilloscope. (P 1 to P n ) can be inspected. In the conventional analog IC test apparatus as described above, each pin (P 1 to P n ) of the analog IC 10, which is a measurement target, is inserted into the printed circuit board 20 by an operator who performs a measurement operation as shown in FIG. Connect the oscilloscope to measure the signal voltage or signal current output from each pin (P 1 ~ P n ) of the analog IC 10, and then the measurement data (DATA) and the manufacturer of the analog IC (10) Good and bad products were distinguished by comparing the data in the characteristic table and graph of the published data book. In the conventional analog IC test apparatus as described above, voltage and current signal data displayed on an oscilloscope screen by an operator performing measurement work are output from each pin P 1 to P n of the analog IC 10 as a measurement target. Since the data from the data book issued by the manufacturer of the analog IC 10 is manually compared with each other to discriminate between good and bad products, errors in the process of discriminating between good and bad goods due to the error of the measurement operator Severe occurrences resulted in a problem of lack of confidence in the measurement. In addition, when the operator who performs the measurement value is to measure the characteristics of the analog IC 10 by hand, the time required for the work is long, there is also a problem that the efficiency of production is reduced. Therefore, the present invention temporarily stores the signal data output from each pin of the analog IC sequentially in a memory in order to solve all the problems occurring in the conventional analog IC test apparatus, and stores the stored data and good quality. It is an object of the present invention to provide a test apparatus for analog ICs in which the data of states can be automatically compared with each other by the main controller. In addition, the present invention can reduce the time required for the measurement by realizing a device that can automatically execute the test of the analog IC, it is possible to accurately determine the good and bad parts, the test of the analog IC that can improve the reliability The purpose is to provide a device. The above and other objects of the present invention, in the test apparatus of the analog IC 10 which is a measurement object inserted on the printed circuit board 20, according to the control signal of the decoder unit 40, each of the analog IC 10 Of the analog IC 10 connected to the relay unit 30 and the relay of the driven relay unit 30 which are sequentially driven to output the signal data output from the pins P 1 to P n to the buffer unit 80. A buffer unit 80 for buffering the signal data output from each of the pins P 1 to P n and an attenuation / amplification unit 90 for attenuating or amplifying the signal data buffered through the buffer unit 80 into a predetermined signal. And convert the sample / hold unit 100 and the analog signal data sampled from the sample / hold unit 100 to temporarily store the sampled signal data output from the attenuation / amplifying unit 90 into digital signal data. Analog / D output to memory section 60 Enable the signal and the clear signal of the main controller 70 by receiving the BS (Bank Selection) signal from the digital change unit 200 and the decoder unit 40 and receiving the signal data input through the analog / digital converter 200. It is achieved by a test apparatus of an analog IC, characterized in that the counter unit 50 receives the clock signal to sequentially controllable counting the decoder unit 40. 1 is an illustration showing an analog IC to be inserted on a printed circuit board, 2 is a side view showing an analog IC inserted on a printed circuit board, 3 is a block diagram of a test apparatus for an analog IC according to the present invention. 4 is a block diagram illustrating a process of sequentially inputting data to a memory unit in a test apparatus of an analog IC according to the present invention. Explanation of symbols on the main parts of the drawings 10: Analog IC 20: Printed Circuit Board 30: relay unit 40: decoder unit 50: counter 60: memory 70: main control unit 80: buffer unit 90: attenuation / amplification part 100: sample / hold part 200: analog / digital converter In constructing a test apparatus for an analog IC of the present invention, The relay unit 30 excites an excitation unit of the corresponding relay according to a control signal output from the decoder unit 40 and each of the analog ICs 10 which are the measurement targets inserted into the printed circuit board 20. The signal output from the pins P 1 to P n of the P1 to P n can be transmitted to the buffer unit 80, and one side of each relay contact switch corresponds to each of the analog ICs 10 to be measured. the pin is connected to a (P 1 ~P n), is connected to a respective pin (P 1 ~P n) of each of the relay contact switch which is an analog IC (10), the other side of each relay contact switches, It is connected to the buffer unit 80, one side of each relay excitation unit of the relay unit 30 is connected to the reference voltage source (Vcc) via a resistor (R), the other side of each relay excitation unit is the decoder unit 40 ) The decoder 40 is to excite a relay of the relay unit 30 according to a control signal transmitted from the counter 50. It is connected to the corresponding excitation part of the relay connected to each of the output pins P 1 to P n of the analog IC 10, and is connected to the output end of the counter part 50, and controls the counter part 50. A signal is input to receive a BS (Bank Selection) signal to the memory unit 60. The counter unit 50 counts and controls the decoder unit 40 sequentially according to an enable signal, a clear signal, and a clock signal input from the main controller 70. I can do it. As shown in FIGS. 3 and 4, the memory unit 60 receives a BS (Bank Selection) signal from the decoder unit 40 from each output pin P 1 to P n of the analog IC 10. As the output signal data can be saved at the designated address, It is connected to the analog / digital changer 200, the main controller 70 that controls the entire system, and the decoder 40. The above and other objects, features, and effects of the present invention will be more clearly understood by the embodiments described with reference to the accompanying drawings. 3 is a block diagram illustrating a process of sequentially inputting data to a memory unit in a test apparatus of an analog IC according to the present invention. First, the data of the analog IC 10 to be measured is extracted from the data book (Data Book) issued by the manufacturer to drive the device of the present invention. When the operator who performs the measurement and inspection work to operate the keyboard (Key Board) connected in the main control unit 70 to give a work command, The main controller 70 transmits an enable signal, a clear signal, and a clock signal to the input terminal of the counter unit 50 by the received work command signal. At this time, the counter unit 50 having a predetermined number of bits is counted in order to sequentially drive the decoder unit 40 by a signal input from the main controller 70. The signal counted by the counter unit 50 is input to the decoder unit 40, and the decoder unit 40 that receives the counted signal from the counter unit 50 outputs each output of the analog IC 10 as a measurement target. The relay excitation portions of the relay portion 30 connected to the pins P 1 to P n are sequentially controlled (that is, from the analog IC P 1 to the output pin P n ) so as to be excited. Output pins P 1 to P n of the analog IC 10 as the measurement target by the relay excitation units of the relay unit 30 sequentially excited according to the control signal of the decoder unit 40. The relay contact switch connected to the N / A maintains a predetermined time and is turned on in order. Therefore, the signal data output from the respective output pins P 1 to P n of the analog IC 10 as the measurement target are transmitted to the buffer unit 80 while maintaining a predetermined time. The signal transmitted to the buffer unit 80 is buffered through the buffer unit 80, and the buffered signal data is attenuated or amplified to a predetermined size through the attenuation / amplification unit 90, Signal data input through the attenuation / amplification part 90 by the attenuation / amplification part 90 (that is, from the output pin P 1 to the output pin P n of the analog IC 10). Output signal) is sampled through the sample / hold unit 100 and temporarily stored at the same time. The signal data surfaced and temporarily stored in the sample / hold unit 100 are converted into digital signal data through the analog / digital change unit 200 and input to the memory unit 60. At this time, the decoder unit 40 outputs a BS (Bank Selection) signal to the memory unit 60. As shown in FIG. 4, the memory unit 60 receiving the BS signal from the decoder unit 40 receives the signal data output from each output pin P 1 to P n of the analog IC 10. It will be saved sequentially at the designated address. Data signals sequentially stored at the corresponding designated addresses of the memory unit 60 are input to the main controller 70, and the main controller 70 receives signal data input from the memory unit 60 and its own memory. It is to automatically compare the data set in the () to determine the genuine and defective products of the analog IC (10). As described above, the present invention temporarily stores the signal data output from the output pins P 1 to P n of the analog IC sequentially in the memory unit, and automatically stores the stored signal data and the good quality data in the main control unit. By realizing the devices that can be compared with each other, the time required for the measurement can be reduced, and the good and bad parts can be accurately identified, thereby improving the reliability of the analog IC test process.
权利要求:
Claims (1) [1" claim-type="Currently amended] In the test apparatus of the analog IC 10, which is a measurement target inserted on the printed circuit board 20, in accordance with the control signal of the decoder 40, each pin (P 1 ~ P n ) of the analog IC (10). Each pin (P 1 to P) of the relay unit 30 sequentially driven to output the signal data output from the buffer unit 80 and the analog IC 10 connected to the relay of the driven relay unit 30. n ) a buffer unit 80 for buffering the signal data output from the attenuator, an attenuation / amplification unit 90 for attenuating or amplifying the signal data buffered through the buffer unit 80 into a predetermined signal, and the attenuation / amplification unit The sample / hold unit 100 for sampling and temporarily storing the signal data output from the 90 and the analog signal data sampled in the sample / hold unit 100 are converted into digital signal data and then stored in the memory unit 60. Analog / digital change unit 200 and the deco The receiver 40 receives a BS (Bank Selection) signal from the adder 40 and receives the enable signal and the clear signal and the clock signal of the main controller 70 from the signal data inputted through the analog / digital converter 200. A test apparatus of an analog IC, characterized in that consisting of a counter unit 50 to sequentially controllable counting.
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法律状态:
1997-10-31|Application filed by 전주범, 대우전자 주식회사 1997-10-31|Priority to KR1019970057276A 1999-05-15|Publication of KR19990035473A
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申请号 | 申请日 | 专利标题 KR1019970057276A|KR19990035473A|1997-10-31|1997-10-31|Analog IC's test device| 相关专利
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